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83006 / 60206 ms ot b8-6818 no.a0238-1/12 any and all sanyo semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo semiconductor representative nearest you before usingany sanyo semiconductor products described or contained herein in such applications. sanyo semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated val ues (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor products described or contained herein. LA73024AV overview this LA73024AV is a do uble scart interface ic. functions ? av switches, ? changeable gain amp ? 6db amp+driver ? fss output specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit v cc v max 24, 29 pin 6.0 v maximum supply voltage v cc a max 14 pin 13.0 v allowable power dissipation pd max ta 80 c ? 760 mw operating temperature topr -20 to +80 c storage temperature tstg -55 to +150 c ? when mounted on a 114.3 76.1 1.6mm 3 glass epoxy board. operating conditions at ta = 25 c parameter symbol conditions ratings unit v cc v pins 24 and 29 5.0 v recommending operation voltage v cc a pin 14 12.0 v v cc v op pins 24 and 29 4.5 to 5.5 v operating voltage range v cc a op pin 14 11.5 to 12.5 v orderin g number : ena0238 monolithic linear ic double scart interface ic www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV no.a0238-2/12 electrical characteristics at ta = 25 c, v cc = 5.0v, v cc a = 12.0v ratings parameter symbol conditions min typ max unit current dissipation 1 i cc v1 pin 24 flow in current when non-signal 16.0 24.0 32.0 ma current dissipation 2 i cc v2 pin 29 flow in current when non-signal 12.0 18.0 24.0 ma current dissipation 3 i cc a pin 14 flow in current when non-signal 17.0 25.0 33.0 ma fss output h voltage v h fss serial control select fss out h v cc a-1.0 v cc a-0.5 v cc av fss output m voltage v m fss serial control select fss out m 5.0 6.0 7.0 v fss output l voltage v l fss serial control select fss out l 0 0.1 0.5 v m 2.0 3.61 10.0 ma fss output cut off current i cutoff flow out current when pin 20 connecting to gnd. h 2.0 3.78 10.0 ma external control terminal h voltage v exth r l = 1.8k ? , v cc 3 < 13v v cc 3-0.2 v cc 3 v r l = 1.8k ? , v cc 3 = 5v 0 0.7 1.0 v external control terminal l voltage v extl r l = 10k ? , v cc 3 = 5v 0 0.15 1.0 v r l = 1.8k ? , v cc 3 = 5v 2.2 2.4 2.78 ma external control terminal drive current i dr r l = 10k ? , v cc 3 = 5v 400 485 500 a external mute control h v mutectlh external mute h, control voltage of pin 9. 4.0 v cc vv external mute control l v mutectll external mute l, control voltage of pin 9. 0 1.0 v video switches part voltage gain v1 vg 1v pins 25 and 26 output, 100% white 5.6 6.1 6.6 db voltage gain v2 vg 2v pin 5 output g2 d6-l, 100% white -0.4 0.1 0.6 db voltage gain v3 vg 3v pin 5 output g2 d6-h,100% white 5.6 6.1 6.6 db frequency characteristics vf f = 100khz/7mhz -0.5 -0.0 0.5 db dg differential gain dg v in = 1vp-p -1.0 0.0 1.0 % dp differential phase dp v in = 1vp-p -1.5 0.0 1.5 deg output voltage v out pins 25 and 26 dc voltage when non-signal. 1.15 2.0 v audio switches part voltage gain 1a v g1a serial control select 0db. -0.3 0.2 0.7 db voltage gain 2a v g2a serial control select 2db. 1.7 2.2 2.7 db voltage gain 3a v g3a serial control select 4db. 2.7 4.2 4.7 db voltage gain 4a v g4a serial control select 6db. 5.7 6.2 6.7 db voltage gain 5a v g5a serial control select 6db. 11.7 12.2 12.7 db maximum output level v omax output level at the time of f = 1khz, thd = 2% 23.0 vrms total harmonic distortion thd v in = 1vrms, f = 1khz, amp 0db 0.06 0.20 % output noise voltage v onoise rg = 1k ? , jis-a filter -100 -90 dbm cross talk between channel v ctka v in = 1vrms, f = 1khz -90 -75 db mute attenuation v mutea v in = 1vrms, f = 1khz -90 -75 db input impedance z in 40 50 60 k ? output off set voltage v ofset off set voltage at the time of changeover sw. -20 0 20 mv design guarantee items ratings parameter symbol conditions min typ max unit mute attenuation v mutev v in = 1vp-p, f = 4.43mhz -60 -50 db cross-talk between channel v ctkv v in = 1vp-p, f = 4.43mhz driver output terminated with 75 ? . -60 -50 db www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV no.a0238-3/12 package dimensions unit : mm 3277 7.6 15.0 0.65 5.6 (0.68) (1.5) 44 23 1 22 0.22 0.5 0.2 0.1 1.7max sanyo : ssop44(275mil) www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV no.a0238-4/12 block diagram and sample application circuit www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV no.a0238-5/12 pin functions pin no. pin name function dc voltage equivalent circuit 1 2 10 11 15 16 33 34 36 37 a in 1r a in 1l a in 2r a in 2l a in 3r a in 3l a in 4l a in 4r a in 5l a in 5r audio input terminal. 5.58v 3 4 19 35 extctl1 extctl2 extctl3 extctl4 general purpose output. open collector. 2.5ma, on 0.75v off open video output terminal. push-pull output low-impedance. 1.10v 5 v out 6 17 27 32 38 gnd gnd gnd gnd gnd (ext-75 ? driver) (dec-75 ? deiver) 0v continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV no.a0238-6/12 continued from preceding page. pin no. pin name function dc voltage equivalent circuit video input terminal. sync-tip clamp input hi-impedance. 1.8v 7 13 18 23 28 v in 1 v in 2 v in 3 v in 4 v in 5 8 pwrsav power save mode select pin. open: l 0.2v 9 aumute control terminal for audio mute. open: low 0.05v 12 reffil terminal for ref_dc ripple removing. 4.94v 14 v cc 12 v cc for audio. continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV no.a0238-7/12 continued from preceding page. pin no. pin name function dc voltage equivalent circuit 20 fssout fss control terminal. output h, m, l 3 values with serial control. h: v cc -0.5v m: 6v l: 0v 21 data serial data input terminal. conformed to i 2 c bus. 22 clock serial clock input terminal. conformed to i 2 c bus. 24 v cc 5a control v cc for video. power save open video driver output terminal. push-pull output low-impedance. 1.10v 25 26 v out 75a v out 75b 29 v cc 5b always v cc for video. continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV no.a0238-8/12 continued from preceding page. pin no. pin name function dc voltage equivalent circuit 30 31 42 43 a out 2l a out 2r a out 3l a out 3r audio output terminal push-pull output low-impedance 4.91v 39 40 a out 1l a out 1r audio output terminal push-pull output low-impedance 4.91v 41 44 pwrmute1 pwrmute2 output terminal of audio muting 0v power save LA73024AV has two supplies 5v for video part and 12v for audio part and fss output. LA73024AV separates perfectly 5v system from 12v system, so it can be individually movement. for example when in the stand-by mode, if you open 14 pins but 5v supplies 24 and 29 pins, video part and serial control part work normally. in this case audio part and fss output don?t work normally. and when you pull up 8pin and open 24 pin , ic chooses automatically video sw3-b.consequently ext input and decoder output only move , you can save more power dissipation . audio mute LA73024AV builds in two mute transistors for reduce audio pop-noise when occur at power on and off. you can control both on serial control and on external parallel control for audio mute. www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV no.a0238-9/12 serial control specification slave address msb lsb 1 0 0 1 0 0 0 0 slave receiver data format s slave address (8bit) a sub address (8bit) a data address (8bit) a p start condition acknowledge stop condition sub address and data byte table data byte (underline is initial setting.) sub address hexadecimal d8 d7 d6 d5 d4 d3 d2 d1 01 (0000 0001) sw1 00: c 01: b 10: a 11: a sw2 00: d 01: c 10: b 11: a sw3 00: c 01: b 10: a 11: * fssout 00: high 01: high 10: mid 11: low 02 (0000 0010) ext ctl1 0: l 1: h ext ctl2 0: l 1: h amp gain vps out 0: 0db 1: 6db audio amp gain1 (dec out) 000: 0db 001: 2db 010: 4db 011: 6db 100:12db audio amp gain2 (ext out) 00: 0db 01: 2db 10: 4db 11: 6db 03 (0000 0011) mute1 vsw1 out 0: through 1: mute mute2 vsw2 out 0: through 1: mute mute3 vsw3 out 0: through 1: mute mute4 asw1 out 0: through 1: mute mute5 asw2 out 0: through 1: mute mute6 asw3 out 0: through 1: mute ext ctl3 0: l 1: h ext ctl4 0: l 1: h data transfer i 2 c-bus control system is adopted in sw ic and sw ic is controlled by scl (serial clock) and sda (serial data) at first, please set up the start condition *1 by these two terminals (scl and sda). and next, please input the 8bits data which should be synchronized with scl in to sda terminal. still more, please give priority to high rank bit at data transfer order (msb lsb). the 9th bit is called as ack (acknowled ge), sw ic sends [0] to the sda terminal during scl [1] period. so, please open the port of micro-processor during this period. LA73024AV adopt auto-increment, so you input only first sub-address data (called as group) and you can transfer data in order. as thus the data transfer stop condition *2 is finished. *1 sda rise up during sci is [1] *2 sda fall down during scl is [1] www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV no.a0238-10/12 transfer data format the transfer data is composed by start condition, slave address data *3 , and stop condition. after setting up the start condition, please transfer the sl ave address (regulated as ?1001000? in sw ic). group and next control data (please see the fig. 1) slave address is composed by 7bits, and this bit 8th bit *4 should be set as [0]. but sw ic is not equipped with such a data out function, please keep this bit as [0]. the both of group data and control data are composed by 8bits, and the one control action is defined with combination of these two data. and if you want to control 2 or more groups at the same mode, you can realize it by sending some control data together. the data makes meaning with all bits, so you cannot stop the sending until all data transfer is over. but LA73024AV adopt auto-increment, for example you can stop to transfer stop condition after group 2 data . if you want to stop transfer action, please transfer the stop condition without fail. *3 there are 3 control groups. *4 this 8th bit called as r/w bit, and th is bit shows the data transmission dir ection. [0] means send mode (accept mode with sw ic) and [1] means accept mode (s end mode with sw ic) fundamentally. data structure start condition slave address r/ w ack group ack control data ack stop condition initialize sw ic is initialized as the following mode for circuit protec tion. please see ?sub address and data byte table? on page 9. characteristics of the sda and scl 1/0 stages for sw ic parameter symbol min max unit low level input voltage v il 0 1.5 v high level input voltage v ih 3.5 5.0 v low level output current i ol 3.0 ma scl clock frequency f scl 100 khz set-up time for a repeated start condition t su: sta 4.7 s hold time start condition. after this period, the first clock pulse is generated. t hd: sta 4.0 s low period of the scl clock t low 4.7 s rise time of both sda and sdl signals t r 0 1.0 s high period of the scl clock t high 4.0 s fall time of both sda and sdl signals t f 0 1.0 s data hold time t hd: dat 0 s data set-up time t su: dat 250 ns set-up time for stop condition t su: sto 4.0 s bus free time between a stop and start condition t buf 4.7 s definition of timing www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV no.a0238-11/12 test circuit www.datasheet.co.kr datasheet pdf - http://www..net/
LA73024AV ps no.a0238-12/12 specifications of any and all sanyo semiconductor pr oducts described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. to verify s ymptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. sanyo semiconductor co., ltd. strives to supply high- quality high-reliability products. however, any and all semiconductor products fail with some probabi lity. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property . when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo semiconductor produc ts (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording , or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo semiconductor co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the "delivery specification" for the sanyo semiconductor product that you intend to use. information (including circuit diagrams and circui t parameters) herein is for example only; it is not guaranteed for volume production. sanyo semicondu ctor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. this catalog provides informati on as of june, 2006. specifications and information herein are subject to change without notice. www.datasheet.co.kr datasheet pdf - http://www..net/

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